Title :
Sizing a packet reassembly buffer at a host computer in an ATM network
Author :
Smith, Donald E. ; Chao, H. Jonathan
Author_Institution :
Bellcore, Red Bank, NJ, USA
fDate :
12/1/1995 12:00:00 AM
Abstract :
This paper develops a queueing model of a buffer that collects cells for reassembly into packets for a protocol layer above the asynchronous transfer mode (ATM) layer. Whenever the buffer fills with all packets incomplete, a packet must be sacrificed to make room for others. The queueing model estimates the equilibrium fraction of packets sacrificed under one algorithm for selecting the packet to be sacrificed. The paper also uses simulation to compare three sacrifice algorithms. The model´s predicted packet loss probabilities bound from above the loss probabilities in the simulations of the different algorithms. Applications to sizing the buffer for a prescribed loss probability are given
Keywords :
asynchronous transfer mode; buffer storage; packet switching; probability; protocols; queueing theory; ATM layer; ATM network; algorithm; equilibrium fraction of packets; host computer; loss probabilities; packet loss probabilities; packet reassembly buffer sizing; protocol layer; queueing model; sacrifice algorithms; simulation; Application software; Asynchronous transfer mode; Chaos; Circuits; Computer networks; Intelligent networks; Packet switching; Predictive models; Switches; USA Councils;
Journal_Title :
Networking, IEEE/ACM Transactions on