DocumentCode :
1150214
Title :
Silicon-on-insulator `HRes´ circuit
Author :
Marshall, G.F. ; Collins, Stephen ; Bunyan, R.J.T.
Author_Institution :
Defense Res. Agency, Malvern
Volume :
30
Issue :
15
fYear :
1994
fDate :
7/21/1994 12:00:00 AM
Firstpage :
1238
Lastpage :
1240
Abstract :
Retinal circuits in bulk CMOS are complicated by the need to compensate for the back-gate effect. However, partially depleted silicon-on-insulator devices have a greatly reduced back-gate effect compared to bulk CMOS. Silicon retinae implemented using SOI technology would therefore be smaller and simpler than the bulk CMOS equivalent. This could lead to considerable improvements in resolution and yield
Keywords :
CMOS integrated circuits; SIMOX; analogue processing circuits; elemental semiconductors; image processing equipment; neural chips; silicon; CMOS IC; SOI technology; Si; partially depleted SOI devices; retinal circuits;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19940819
Filename :
311915
Link To Document :
بازگشت