DocumentCode :
1150484
Title :
Limitations on Carry Lookahead Networks
Author :
Rhyne, Tom
Author_Institution :
Department of Electrical Engineering, Texas A&M University
Issue :
4
fYear :
1984
fDate :
4/1/1984 12:00:00 AM
Firstpage :
373
Lastpage :
374
Abstract :
The fan-in and fan-out limitations imposed by specific gate circuits force corresponding limits-upon the sizes of carry lookahead circuits fabricated from those gates. The relationships between those limits are derived, providing simple formulae that can be used by designers seeking to fabricate fast combinational binary adders.
Keywords :
Binary addition; carry lookahead; high-speed arithmetic; Adders; Central Processing Unit; Circuits; Computer architecture; Computer industry; Digital arithmetic; Equations; Hardware; Logic; Supercomputers; Binary addition; carry lookahead; high-speed arithmetic;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1984.1676445
Filename :
1676445
Link To Document :
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