DocumentCode
1151756
Title
On the Rearrangeability of 2(Iog2 N) –1 Stage Permutation Networks
Author
Lee, Kyungsook Yoon
Author_Institution
Department of Computer and Information Science, The Ohio State University
Issue
5
fYear
1985
fDate
5/1/1985 12:00:00 AM
Firstpage
412
Lastpage
425
Abstract
For any parallel computer systems which consist of many processing elements and memories, interconnection networks provide communication paths among processing elements and memories. Both the rearrangeability proof and the control algorithm are well known for the Benes network, which is intrinsically symmetric. However, there has been little progress for the case of nonsymmetric networks of similar hardware requirements.
Keywords
Control algorithm; hardware redundancy; hardware requirement; interconnection network; multistage networks; passable permutations; permutation; rearrangeability; Communication system control; Computer networks; Concurrent computing; Hardware; Information science; Intelligent networks; Mirrors; Multiprocessor interconnection networks; Switches; US Department of Energy; Control algorithm; hardware redundancy; hardware requirement; interconnection network; multistage networks; passable permutations; permutation; rearrangeability;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1985.1676581
Filename
1676581
Link To Document