Title :
On the Performance of Synchronous Multiprocessors
Author_Institution :
Department of Computer Science, University of Minnesota
fDate :
5/1/1985 12:00:00 AM
Abstract :
In this correspondence, we study the performance of a multiprocessor in which a crossbar is employed to interconnect p processors to m commonly shared memory modules. A set of nonuniformly distributed probabilities including a probability P(0) which denotes the probability of a processor not generating any request is also employed to illustrate the program behavior, but no distinction is made between processors. Several relations between the average request completion time, the average processor utilization, and the effective memory bandwidth are obtained. One approximation method based on the idea of aggregation is proposed. Its solutions are compared to the exact solution.
Keywords :
Crossbar switch; MIMD architectures; memory interference; multiprocessor systems; queueing model; Approximation methods; Bandwidth; Computer architecture; Interference; Mathematical model; Memory architecture; Multiprocessing systems; Multiprocessor interconnection networks; Space technology; Switches; Crossbar switch; MIMD architectures; memory interference; multiprocessor systems; queueing model;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1985.1676585