DocumentCode
1151909
Title
A VLSI architecture for video-object segmentation
Author
Kim, Jinsang ; Chen, Tom
Author_Institution
Sch. of Electron. & Inf., Kyung Hee Univ., Seoul, South Korea
Volume
13
Issue
1
fYear
2003
fDate
1/1/2003 12:00:00 AM
Firstpage
83
Lastpage
96
Abstract
Object-based coding and description in real time are increasingly important for many image and video applications. We propose a very large scale integration (VLSI) architecture based on a novel segmentation algorithm for extracting objects in video. The segmentation architecture of a frame mainly consists of two functional phases. In the first phase, pixel-based static and dynamic features in video are extracted, filtered, normalized. These multiple features are labeled using a self-organizing feature map neural networks architecture to generate initial segmentation labels. An edge fusion module in the second phase combines the initial segmentation labels and a linked edge map of a frame to generate more accurate segmentation where region boundaries are closer to the actual object boundaries. Computational and hardware complexities of the proposed architecture are estimated in terms of the number of clocks, arithmetic components, gates, and memory requirements. The performance of the proposed VLSI architecture demonstrates the possibility of performing object-oriented video segmentation in real time.
Keywords
VLSI; computational complexity; data compression; feature extraction; image segmentation; neural net architecture; self-organising feature maps; video coding; VLSI architecture; arithmetic components; clocks; computational complexity; dynamic features; edge fusion module; feature extraction; gates; hardware complexity; image applications; linked edge map; memory requirements; neural network architecture; object extraction; object-based coding; object-based description; pixel-based static; real time video segmentation; region boundaries; segmentation algorithm; segmentation architecture; segmentation labels; self-organizing feature map; very large scale integration; video applications; video-object segmentation; Application software; Computer architecture; Fusion power generation; Hardware; Image segmentation; Layout; MPEG 4 Standard; MPEG 7 Standard; Signal processing algorithms; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher
ieee
ISSN
1051-8215
Type
jour
DOI
10.1109/TCSVT.2002.808082
Filename
1180384
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