• DocumentCode
    1152207
  • Title

    Reconfiguration Algorithms for Interconnection Networks

  • Author

    Oruc, A. Yavuz ; Oruc, M. Yaman ; Balabanian, Norman

  • Author_Institution
    Department of Electrical, Computer and Systems Engineering, Rensselaer Polytechnic Institute
  • Issue
    8
  • fYear
    1985
  • Firstpage
    773
  • Lastpage
    776
  • Abstract
    The correspondence examines the functional relations within a class of multistage interconnection networks. It is known that these networks are not rearrangeable. This fact has led to some research on interconnection network relations. The correspondence deals with one aspect of this research, namely, that of constructing an equivalence map between two interconnection networks. Procedures are given to test whether two such networks are equivalent. Whenever they are, these procedures also produce a map to conjugate one network onto the other.
  • Keywords
    Conjugation map; cycle map; functional equivalence; interconnection network; permutation map; Electric variables control; Intelligent networks; Mathematics; Multiprocessor interconnection networks; Parallel processing; Switches; Systems engineering and theory; Testing; Conjugation map; cycle map; functional equivalence; interconnection network; permutation map;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1985.1676628
  • Filename
    1676628