DocumentCode
1152302
Title
Concurrent Fault Detection in Microprogrammed Control Units
Author
Iyengar, Vijay S. ; Kinney, L.L.
Author_Institution
IBM T. J. Watson Research Center
Issue
9
fYear
1985
Firstpage
810
Lastpage
821
Abstract
This paper specifies procedures for defining a monitor circuit that can detect faults in microprogram sequencers. The monitor and the sequencer operate in parallel and errors are detected by comparing outputs from the monitor circuit with outputs from the sequencer. Faults that cause errors in the flow of control are detectable, as well as some faults that cause errors only in the microinstruction fields. The design procedure presented for monitors consists of four parts. First, a model of the program flow is constructed that only retains the information required to define a monitor. Second, faults in a specified fault set are modeled by the errors they cause in the program flow model. Third, the functional requirements of the monitor are specified in terms of partitions on the states of the program flow model. Fourth, the logic design of the monitor is completed.
Keywords
Concurrent error detection; error-detecting codes; fault secure; microprogrammed controller; monitors; partition algebra; self-testing; Algebra; Built-in self-test; Circuit faults; Condition monitoring; Digital systems; Electrical fault detection; Error correction; Error correction codes; Fault detection; Logic design; Concurrent error detection; error-detecting codes; fault secure; microprogrammed controller; monitors; partition algebra; self-testing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1985.1676637
Filename
1676637
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