Title :
Comparator with Completion Signal
Author_Institution :
Department of Computer Science, Columbia University
Abstract :
This note provides a design of a binary comparator with completion signal. The average propagation delay is a constant, independent of n, the number of inputs, while the logic complexity is a linear function of n.
Keywords :
Binary comparator; completion signal; delay; hazard; tree circuit; Circuits; Computer science; Hazards; Logic; Propagation delay; Roentgenium; Signal design; Signal generators; Signal processing; Tree data structures; Binary comparator; completion signal; delay; hazard; tree circuit;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1985.1676642
