Title :
A Heuristic for Suffix Solutions
Author :
Bilgory, Avinoam ; Gajski, Daniel D.
Author_Institution :
Department of Electrical Engineering, Technion—Israel Institute of Technology
Abstract :
The suffix problem has appeared in solutions of recurrence systems for parallel and pipelined machines and more recently in the design of gate and silicon compilers. In this paper we present two algorithms. The first algorithm generates parallel suffix solutions with minimum cost for a given length, time delay, availability of initial values, and fanout. This algorithm generates a minimal solution for any length n and depth range from log2 n to n. The second algorithm reduces the size of the solutions generated by the first algorithm.
Keywords :
Area-time complexity; VLSI layouts; binary addition; carry- lookhead computation; combinational logic; prefix computation; recurrence computation; silicon compilers; Area measurement; Computer science; Concurrent computing; Costs; Delay effects; Helium; Logic; Silicon compiler; Transducers; Very large scale integration; Area-time complexity; VLSI layouts; binary addition; carry- lookhead computation; combinational logic; prefix computation; recurrence computation; silicon compilers;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1986.1676655
