DocumentCode :
1152609
Title :
Reduction of lateral phosphorus diffusion in CMOS n-wells
Author :
Ahn, S.T. ; Kennel, H.W. ; Plummer, J.D. ; Tiller, W.A.
Author_Institution :
Stanford Univ., CA, USA
Volume :
37
Issue :
3
fYear :
1990
fDate :
3/1/1990 12:00:00 AM
Firstpage :
806
Lastpage :
807
Abstract :
It is shown that it is possible to control lateral diffusion of phosphorus during an n-well drive-in through appropriate choices of surface thin-film and drive-in conditions. This permits reduced design rules with no change in lithography. The n-well drive-in process takes advantage of vacancy supersaturation caused by SiO formation. In an n-well structure, vacancies are injected only outside the well region, from the thin oxide, and virtually no vacancies are injected from the thick SiO2-Si interface. Therefore, while normal P diffusion in the vertical direction in the well is still expected, lateral diffusion of P into the region under the thin oxide can be retarded
Keywords :
CMOS integrated circuits; diffusion in solids; elemental semiconductors; integrated circuit technology; phosphorus; semiconductor doping; silicon; CMOS n-wells; IC fabrication; Si:P; SiO formation; SiO2-Si interface; design rule reduction; drive-in conditions; lateral diffusion control; n-well drive-in; semiconductor doping; surface thin-film; thin oxide; vacancy supersaturation; Ion implantation; Lithography; Materials science and technology; Semiconductor films; Shape control; Temperature; Thickness control; Transistors; US Department of Defense; Very high speed integrated circuits;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.47790
Filename :
47790
Link To Document :
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