Title :
A Signed Bit-Sequential Multiplier
Author :
Rhyne, Tom ; Strader, Noel R., II
Abstract :
Bit-sequential algorithms for arithmetic processing are good candidates for VLSI signal processing circuits because of their canonical structure and minimal interconnection requirements. Several recent papers have dealt with algorithms that accept unsigned binary inputs, one bit at a time, least significant bit first, and produce an unsigned binary product in a bit-serial fashion.
Keywords :
Bit-sequential multiplication; Booth´s algorithm; VLSI signal processing circuits; carry-save arithmetic; computer arithmetic; Clocks; Digital arithmetic; Hardware; Integrated circuit interconnections; Signal processing algorithms; Very large scale integration; Bit-sequential multiplication; Booth´s algorithm; VLSI signal processing circuits; carry-save arithmetic; computer arithmetic;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1986.1676680
