Abstract :
MULTIPLE-valued logic has been the object of much research over the last fifteen years. Since 1971, there has been an annual symposium devoted exclusively to the subject and, during that time, nearly 600 papers have appeared in its Proceedings. In addition, a large number of technical papers have appeared elsewhere together with a number of survey articles [1]-[4] and a number of textbooks [5]-[7]. Much of the older work was of a purely theoretical nature concerned with the functional completeness of sets of operators, functional minimization, and similar problems from switching theory and logic design. Work on the hardware implementation of multiple-valued devices has been more recent (see [8] for an early discussion).
