DocumentCode
1153373
Title
Approximate Models of Multiple Bus Multiprocessor Systems
Author
Towsley, Don
Author_Institution
Department of Electrical and Computer Engineering, University of Massachusetts
Issue
3
fYear
1986
fDate
3/1/1986 12:00:00 AM
Firstpage
220
Lastpage
228
Abstract
Two classes of approximate models are developed for multiprocessor systems containing P processors, M memories, and B buses. One class of models is based on the flow equivalence technique for the approximate analysis of queueing networks. A memory invariance principle is presented and used to obtain the parameters of this model. This approach is used to model homogeneous processor systems where memory times are either constant or exponentially distributed random variables. The second class of models is based on the method of surrogate delays also commonly used in the approximate analysis of queueing networks. This approach produces an iterative algorithm which can be used to evaluate heterogeneous systems with exponential memory times. The accuracy of both classes of models is evaluated through simulation. Lastly, as a byproduct of these models, an algorithm is presented with which to determine the distribution of the number of nonempty service centers in a product form queueing network.
Keywords
Bus contention; memory interference; multiprocessors; performance evaluation; product form networks; queueing theory; Convolution; Delay effects; Interference; Iterative algorithms; Multiprocessing systems; Queueing analysis; Random variables; Read-write memory; Routing; Throughput; Bus contention; memory interference; multiprocessors; performance evaluation; product form networks; queueing theory;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1986.1676746
Filename
1676746
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