• DocumentCode
    1153939
  • Title

    Low power serial-parallel dynamic shift register

  • Author

    Lee, L. ; Al-Sarawi, Said ; Abbott, D.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
  • Volume
    39
  • Issue
    1
  • fYear
    2003
  • Firstpage
    19
  • Lastpage
    20
  • Abstract
    Serial-to-parallel shift registers have a wide range of applications. These registers are commonly found in communication systems and interfaces between electronic peripherals. Presented is a unique low power area efficient 128-bit serial-to-parallel shift register design that contains only four transistors per stage. The new register uses the capacitive bootstrapping technique to overcome the threshold voltage drop of MOSFETs. This logic family is named non-ratioed bootstrap logic (NRBL). Target applications are dense smart sensor arrays and image sensors.
  • Keywords
    CMOS logic circuits; VLSI; bootstrap circuits; low-power electronics; sequential circuits; shift registers; 128 bit; CMOS; MOSFETs; NRBL; capacitive bootstrapping technique; dense smart sensor arrays; image sensors; low power area efficient design; nonratioed bootstrap logic; serial-parallel dynamic shift register; threshold voltage drop;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20030056
  • Filename
    1182323