Title :
The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes
Author :
Reed, Irving S. ; Truong, T.K. ; Jensen, J.M. ; Hsu, In-shek
Author_Institution :
Department of Electrical Engineering, University of Southern California
Abstract :
In this paper a recursive algorithm using the error-trellis decoding technique is developed to decode certain convolutional codes (CC´s). An example, illustrating the VLSI architecture of such a decoder, is given for a dual-k CC. It is demonstrated that such a decoder can be realized readily on a single chip with NMOS technology.
Keywords :
Convolutional code; VLSI; Wyner-Ash code; error-trellis syndrome decoder; Algorithm design and analysis; Convolution; Convolutional codes; Decoding; Equations; Laboratories; MOS devices; Propulsion; Very large scale integration; Viterbi algorithm; Convolutional code; VLSI; Wyner-Ash code; error-trellis syndrome decoder;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1986.1676838
