Three-level converter system

This article describes the design guidelines for the construction and control of three-level converters. Loss equations that assist in thermal design and device sizing are provided along with current estimates for sizing link capacitors. The primary commutation mechanisms and the relevant parasitic effects are identified. A low-inductance busplane design is presented for designs featuring dual IGBT modules, and low inductance snubber capacitor connections are shown. The DSP-FPGA platform used to control the prototype is described in some detail. The partitioning of the controls into slower control functions implemented in the DSP and the faster functions synthesized in the FPGA is described. This prototype and controller provided a very flexible base, which was used to verify various modulation strategies, control functions, and power flow regulation algorithms for NPC converters. The lessons learned from the design, build, and test of this converter system can be applied to prototype development for other power electronic converters and systems.