Title :
Inverter-Minimum Networks
Author :
Nakamura, Keijiro
Author_Institution :
Control and Computing Laboratory, Kobe University of Mercantile Marine
Abstract :
Let Fm= (f1,...,fm) be a vector of m logical functions. Let Inv (Fm), the inversion complexity of Fm, be the minimum number of inverters required to realize Fm by a feed-forward network using AND gates, OR gates, and inverters.
Keywords :
Inversion complexity; maximum inversions; minimum inverters; negative function; negative gate; positive function; Boolean functions; Circuit synthesis; Electrons; Feedback; Inverters; Logic design; Logic devices; Network synthesis; Programmable logic arrays; Switching circuits; Inversion complexity; maximum inversions; minimum inverters; negative function; negative gate; positive function;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1987.1676885
