DocumentCode :
1154795
Title :
Rate 1/2 and 2/3 Majority Logic Decodable Binary Burst Error-Correcting Codes
Author :
Zang, Wenlong ; Wolf, Jack Keil
Author_Institution :
Department of Electrical and Computer Engineering, University of Massachusetts
Issue :
2
fYear :
1987
Firstpage :
250
Lastpage :
252
Abstract :
A new design procedure is described for constructing rate 1/2 and rate 2/3 majority logical decodable burst error-correcting codes. The rate 1/2 codes are closely related to the codes of Srinivasan [1].
Keywords :
Burst error codes; ECC codes; VLSI; coding; decoding; error control; fault tolerance; majority logic codes; Computer errors; Decoding; Error correction; Error correction codes; Fault tolerance; Logic design; Magnetic recording; Parity check codes; Random access memory; Very large scale integration; Burst error codes; ECC codes; VLSI; coding; decoding; error control; fault tolerance; majority logic codes;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1987.1676891
Filename :
1676891
Link To Document :
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