DocumentCode
1155328
Title
On an Optimally Fault-Tolerant Multiprocessor Network Architecture
Author
Sengupta, A. ; Sen, A. ; Bandyopadhyay, S.
Author_Institution
Department of Computer Science, University of South Carolina
Issue
5
fYear
1987
fDate
5/1/1987 12:00:00 AM
Firstpage
619
Lastpage
623
Abstract
This correspondence presents a class of optimally fault tolerant multiprocessor network architecture, based on the networks proposed earlier by Pradhan [71, where the networks are represented by regular digraphs. Because of optimal fault tolerapce, the number of connections per node is precisely related to the degree of fault tolerance the network is designed to provide. The routing of messgges in presence Qf faults is adaptive and unless the number of faults is equal to the degree of fault tolerance the increase in routing delay in presence of faults is minimal.
Keywords
Connectivity; diameter of graphs; fault-tolerant network; multiprocessor network; regular graphs; shuffle-exchange graph; Algebra; Algorithm design and analysis; Computer architecture; Fabrication; Fault tolerance; Network synthesis; Notice of Violation; Parallel processing; Systolic arrays; Very large scale integration; Connectivity; diameter of graphs; fault-tolerant network; multiprocessor network; regular graphs; shuffle-exchange graph;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1987.1676947
Filename
1676947
Link To Document