Title :
Pull-down transient-imposed extrinsic base consideration in BiNMOS transistors
Author :
Kuo, James B. ; Chen, Yen-wen
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
5/1/1990 12:00:00 AM
Abstract :
A detailed two-dimensional numerical simulation study of the bipolar devices in the BiCMOS circuit environment during pull-down transients is presented. The charge buildup and removal phenomenon in the bipolar device determines the switching speed of the BiNMOS devices. The tradeoffs in designing the extrinsic base in terms of the switching behavior are also described. It is shown that the structure with the extrinsic base p+ area farthest from the intrinsic base area has the best switching speed owing to the largest initial overshoot in the base voltage and the lateral base effects
Keywords :
BIMOS integrated circuits; bipolar transistors; electric potential; insulated gate field effect transistors; semiconductor device models; transients; BiCMOS circuit environment; BiNMOS transistors; base currents; base voltage overshoot; bipolar devices; charge buildup; charge removal; electrostatic potential; extrinsic base; lateral base effects; pull-down transients; switching speed; two-dimensional numerical simulation; BiCMOS integrated circuits; Bipolar transistor circuits; Doping profiles; Helium; Inverters; MOS devices; Numerical simulation; Steady-state; Two dimensional displays; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on