• DocumentCode
    1157202
  • Title

    A rectilinear-monotone polygonal fault block model for fault-tolerant minimal routing in mesh

  • Author

    Wang, Dajin

  • Author_Institution
    State Key Lab. for Novel Software Technol., Nanjing Univ., China
  • Volume
    52
  • Issue
    3
  • fYear
    2003
  • fDate
    3/1/2003 12:00:00 AM
  • Firstpage
    310
  • Lastpage
    320
  • Abstract
    We propose a new fault block model, minimal-connected-component (MCC), for fault-tolerant adaptive routing in mesh-connected multiprocessor systems. This model refines the widely used rectangular model by including fewer nonfaulty nodes in fault blocks. The positions of source/destination nodes relative to faulty nodes are taken into consideration when constructing fault blocks. The main idea behind it is that a node will be included in a fault block only if using it in a routing will definitely make the route nonminimal. The resulting fault blocks are of the rectilinear-monotone polygonal shapes. A sufficient and necessary condition is proposed for the existence of the minimal "Manhattan" routes in the presence of such fault blocks. Based on the condition, an algorithm is proposed to determine the existence of Manhattan routes. Since MCC is designed to facilitate minimal route finding, if there exists no minimal route under MCC fault model, then there will be absolutely no minimal route whatsoever. We also present two adaptive routing algorithms that construct a Manhattan route avoiding all fault blocks, should such routes exist.
  • Keywords
    fault tolerant computing; multiprocessor interconnection networks; network routing; algorithm; destination nodes; fault-tolerant adaptive routing; fault-tolerant minimal routing; mesh connected multiprocessor systems; minimal Manhattan routes; minimal-connected-component model; nonfaulty nodes; rectangular model; rectilinear-monotone polygonal fault block model; source nodes; Computer architecture; Concurrent computing; Fault tolerance; Fault tolerant systems; Helium; Multiprocessing systems; Multiprocessor interconnection networks; Network topology; Routing; Shape;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2003.1183946
  • Filename
    1183946