Title :
Multimode clock generation using delay-locked loop
Author :
Susplugas, O. ; Philippe, P.
Author_Institution :
Adv. Dev. Group, Philips Semicond., Caen, France
fDate :
2/20/2003 12:00:00 AM
Abstract :
A design of a programmable frequency synthesiser based on an analogue delay-locked loop and the achieved die are presented. It can be used for clocking a digital-to-analogue converter. The results fit well with the depicted theory.
Keywords :
delay lock loops; digital-analogue conversion; frequency synthesizers; programmable circuits; timing circuits; DAC clocking; analogue DLL; analogue delay-locked loop; digital-to-analogue converter; multimode clock generation; programmable frequency synthesiser;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030268
