Title :
Investigation of electrical characteristics on surrounding-gate and omega-shaped-gate nanowire FinFETs
Author :
Li, Yiming ; Chou, Hung-Mu ; Lee, Jam-Wem
Author_Institution :
Dept. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
In this paper, electrical characteristics of small nanowire fin field-effect transistor (FinFET) are investigated by using a three-dimensional quantum correction simulation. Taking several important electrical characteristics as evaluation criteria, two different nanowire FinFETs, the surrounding-gate and omega-shaped-gate devices, are examined and compared with respect to different ratios of the gate coverage. By calculating the ratio of the on/off current, the turn-on resistance, subthreshold swing, drain-induced channel barrier height lowering, and gate capacitance, it is found that the difference of the electrical characteristics between the surrounding-gate (i.e., the omega-shaped-gate device with 100% coverage) and the omega-shaped-gate nanowire FinFET with 70% coverage is insignificant. The examination presented here is useful in the fabrication of small omega-shaped-gate nanowire FinFETs. It clarifies the main difference between the surrounding-gate and omega-shaped-gate nanowire FinFETs and exhibits a valuable result that the omega-shaped-gate device with 70% coverage plays an optimal candidate of the nanodevice structure when we consider both the device performance and manufacturability.
Keywords :
MOSFET; nanoelectronics; nanowires; semiconductor device models; coverage ratio; device fabrication; device manufacturability; device performance; drain-induced channel barrier height lowering; electrical characteristics; gate capacitance; nanodevice structure; omega-shaped-gate nanowire FinFET; on-off ratio; subthreshold swing; surrounding-gate nanowire FinFETs; three-dimensional quantum correction simulation; turn-on resistance; Circuit simulation; Computational modeling; Electric resistance; Electric variables; FETs; Fabrication; FinFETs; Nanoscale devices; Nanostructures; Semiconductor device manufacture; Coverage ratio; device structure; fabrication; fin field-effect transistor (FinFET); gate capacitance; nanodevice; nanowire; omega-shaped-gate; on/off ratio; process technique; quantum correction model; semiconductor devices; subthreshold swing (SS); surrounding gate; three-dimensional (3-D) simulation; turn-on resistance;
Journal_Title :
Nanotechnology, IEEE Transactions on
DOI :
10.1109/TNANO.2005.851410