DocumentCode
1159634
Title
Two-dimensional monolithic lead chalcogenide infrared sensor arrays on silicon read-out chips and noise mechanisms
Author
Zogg, Hans ; Alchalabi, Karim ; Zimin, Dmitri ; Kellermann, Klaus
Author_Institution
Thin Film Phys. Group, Swiss Fed. Inst. of Technol., Zurich, Switzerland
Volume
50
Issue
1
fYear
2003
fDate
1/1/2003 12:00:00 AM
Firstpage
209
Lastpage
214
Abstract
A two-dimensional narrow-gap infrared (IR) focal plane array on an Si substrate where the Si substrate contains the active addressing electronics is described. The array consists of 96 × 128 pixels with 75-μm pitch and is fabricated in a lead-chalcogenide layer grown epitaxially on the Si read-out chip. The cut-off wavelength is 5.5 μm. Each pixel contains a bare Si area, onto which epitaxial growth occurs, and an access transistor. The Si-chips are fabricated in CMOS technology with standard Al-metallization, and the lead chalcogenide layer (PbTe) is grown by molecular beam epitaxy onto the completely processed and tested chips. The photovoltaic IR sensors exhibit mean differential resistances at zero bias Ro of 4 MΩ at 95 K, and yield is up to 98%. The sensitivities described by Ro are limited by the density of threading dislocations crossing the active areas of the devices, as each such dislocation causes a shunt resistance on the order of magnitude of 1 GΩ.
Keywords
CMOS integrated circuits; IV-VI semiconductors; dislocation density; focal planes; integrated circuit noise; lead compounds; molecular beam epitaxial growth; narrow band gap semiconductors; readout electronics; 1 Gohm; 12288 pixel; 128 pixel; 4 Mohm; 5.5 micron; 75 micron; 95 K; 96 pixel; Al-metallization; CMOS technology; PbTe; PbTe 2-D narrow-gap infrared focal plane array; Si; Si read-out chips; Si substrate; access transistor; active addressing electronics; bare Si area; cut-off wavelength; epitaxial growth; epitaxially grown layer; mean differential resistances; molecular beam epitaxy; noise mechanisms; photovoltaic IR sensors; shunt resistance; threading dislocation density; yield; zero bias; CMOS process; CMOS technology; Epitaxial growth; Infrared sensors; Lead; Molecular beam epitaxial growth; Sensor arrays; Silicon; Substrates; Testing;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2002.807257
Filename
1185183
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