DocumentCode :
1159857
Title :
MOSFET ESD Breakdown Modeling and Parameter Extraction in Advanced CMOS Technologies
Author :
Vassilev, Vesselin ; Lorenzini, Martino ; Groeseneken, Guido
Author_Institution :
Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX
Volume :
53
Issue :
9
fYear :
2006
Firstpage :
2108
Lastpage :
2117
Abstract :
This paper describes an approach for modeling the breakdown and snapback behavior of state-of-the-art MOSFET structures using equivalent-circuit description. Such models are required to enable circuit-level electrostatic discharge reliability simulations, which are a major challenge for the industry nowadays. Special attention is given to accurately describing the junction and gate leakage currents due to the increased tunneling generation in the scaled-down CMOS. Consistent parameter extraction procedures for the model parameters are described as well
Keywords :
MOSFET; electrostatic discharge; equivalent circuits; leakage currents; semiconductor device breakdown; semiconductor device models; semiconductor device reliability; CMOS technologies; MOSFET ESD breakdown modeling; MOSFET structures; electrostatic discharge reliability simulations; equivalent circuit description; gate leakage currents; junction leakage currents; parameter extraction; snapback behavior; tunneling generation; CMOS technology; Circuit simulation; Electric breakdown; Electrostatic discharge; MOSFET circuits; Microelectronics; Parameter extraction; Semiconductor device modeling; Substrates; Tunneling; Circuit model; MOSFET breakdown; electrostatic discharge (ESD); snapback; tunneling currents;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2006.880367
Filename :
1677844
Link To Document :
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