DocumentCode :
1160696
Title :
NODIFS-simulating faults fast
Author :
Ghosh, Sumit
Author_Institution :
Div. of Eng., Brown Univ., Providence, RI, USA
Volume :
10
Issue :
5
fYear :
1994
fDate :
9/1/1994 12:00:00 AM
Firstpage :
26
Lastpage :
38
Abstract :
This article introduces, perhaps for the first time, an asynchronous, distributed, circuit partitioned algorithm that is capable of fault simulating both combinational and sequential digital designs on parallel processors. In this approach, called NODIFS (NOvel asynchronous DIstributed algorithm for Fault Simulation), every circuit component is modeled as an asynchronous and concurrent entity that is checked for faults as soon as appropriate signal transitions and fault lists are asserted at its input ports. The circuit is partitioned such that components of every partition are allocated to a unique processor of the parallel processor system
Keywords :
combinatorial circuits; logic CAD; logic testing; parallel algorithms; sequential circuits; NODIFS; circuit partitioned algorithm; combinational digital designs; fault lists; fault simulation; parallel processors; sequential digital designs; signal transitions; Algorithm design and analysis; Circuit faults; Circuit simulation; Circuit testing; Discrete event simulation; Instruments; Partitioning algorithms; Process design; Scalability; System testing;
fLanguage :
English
Journal_Title :
Circuits and Devices Magazine, IEEE
Publisher :
ieee
ISSN :
8755-3996
Type :
jour
DOI :
10.1109/101.313461
Filename :
313461
Link To Document :
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