Architectures for testability and fault tolerance in content-addressable systems

For the next computer generation, which may have extensive artificial intelligence properties, the use of associative processing may have increasing importance. VLSI technologies especially can stimulate the development of larger content-addressable memories (CAMs). The problem of production yield and component failure, as well as that of efficient testability, will be as important as for other computer components. Therefore, compared with conventional random access memory, the more complicated memory structure of CAMs has greater problems of testing and reconfigurability. In the paper, the problems of testability and fault tolerance in different CAMs and content-addressable processor systems are discussed.