DocumentCode :
1161177
Title :
Code-width testing-based compact ADC BIST circuit
Author :
Lee, Dongmyung ; Yoo, Kwisung ; Kim, Kicheol ; Han, Gunhee ; Kang, Sungho
Author_Institution :
Electr. & Electron. Eng. Dept., Univ. of Yonsei, Seoul, South Korea
Volume :
51
Issue :
11
fYear :
2004
Firstpage :
603
Lastpage :
606
Abstract :
This paper proposes a new analog-to-digital converter (ADC) built-in self-test (BIST) scheme based on code-width and sample-difference testing that does not require a slope-calibrated ramp signal. The proposed BIST scheme can be implemented by a simple digital circuit whose gate count is only approximately 550. The proposed BIST scheme is verified by simulation with 138 test circuits of 6-b pipeline ADC with arbitrary faults. Simulation results show that it effectively detects not only the catastrophic faults but also some parametric faults. The simulated fault coverage is approximately 99%.
Keywords :
analogue-digital conversion; built-in self test; fault simulation; integrated circuit testing; logic testing; 6 bits; ADC BIST circuit; analog-to-digital converter; built-in self-test; catastrophic faults; code-width testing; digital circuit; parametric faults; pipeline ADC; sample-difference testing; slope-calibrated ramp signal; Analog-digital conversion; Automatic testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Digital circuits; Electrical fault detection; Fault detection; Pipelines; 65; ADC; Analog-to-digital converter; BIST; built-in self-test; code width;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2004.836034
Filename :
1356174
Link To Document :
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