DocumentCode :
1161291
Title :
Ultra-reliable packaging for silicon-on-silicon WSI
Author :
Hagge, John K.
Author_Institution :
Rockwell Int. Corp., Cedar Rapids, IA, USA
Volume :
12
Issue :
2
fYear :
1989
fDate :
6/1/1989 12:00:00 AM
Firstpage :
170
Lastpage :
179
Abstract :
Silicon-on-silicon WSI (wafer-scale integration) packaging provides electronic equipment with significant reductions in size, weight, cost, and IC junction temperatures, together with significant increases in reliability and high-speed electrical performance. It combines semiconductor lithography techniques, printed-circuit multilayer techniques, and hybrid multichip module techniques. The silicon substrate has multiple layers of metallization and dielectric and services as a silicon circuit board. The author discusses the advantages of using silicon instead of conventional ceramic as the substrate materials and reviews the published status of this technology at other organizations. While conventional hybrid packages are successfully being used in early implementations to reduce size and weight, there exists an untapped potential for significant reliability improvements by switching to packages specifically designed for silicon substrates. Several potential packaging approaches are reviewed and results are presented for the fatigue life and thermal performance of silicon substrates
Keywords :
VLSI; hybrid integrated circuits; packaging; reliability; IC junction temperatures reduction; Si circuit board; Si substrate; Si-Si; WSI; cost reduction; fatigue life; high-speed electrical performance; hybrid multichip module techniques; hybrid packages; increases in reliability; multiple layers of metallization; packaging approaches; printed-circuit multilayer techniques; reductions in size; semiconductor lithography techniques; thermal performance; ultrareliable packaging; wafer-scale integration; weight reduction; Costs; Dielectric substrates; Electronic equipment; Electronics packaging; High speed integrated circuits; Integrated circuit packaging; Packaging machines; Semiconductor device packaging; Silicon; Wafer scale integration;
fLanguage :
English
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0148-6411
Type :
jour
DOI :
10.1109/33.31421
Filename :
31421
Link To Document :
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