Title :
Techniques for fabrication of wafer scale interconnections in multichip packages
Author :
McDonald, John F. ; Lin, How T. ; Greub, Hans J. ; Philhower, Robert A. ; Dabral, Sanjay
Author_Institution :
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
fDate :
6/1/1989 12:00:00 AM
Abstract :
Wafer-scale hybrid packaging (WSHP), multichip modules (MCM), high-density interconnect (HDI), thin-film multilayer (TFML) packaging, and advanced VLSI packaging (AVP) are different terms used to refer to an approach for fabricating chip-to-chip connections using semiconductor technology. However, persistent yield problems have made successful scale-up of the technology to full-sized, system-oriented wafer-scale packages difficult. Most of these problems can be traced to stress resulting from the different thermal properties of the various materials used in fabrication and the high-temperature processing steps involved. The authors explore use of focused-electron-beam and ion-beam repair strategies for coping with residual faults in a model high-yield liftoff process for fabricating wafer-scale interconnections in multichip packages
Keywords :
VLSI; hybrid integrated circuits; packaging; AVP; HDI; MCM; TFML; WSHP; advanced VLSI packaging; chip-to-chip connections; fabrication; focused-electron-beam; high-density interconnect; high-yield liftoff process; ion-beam repair strategies; multichip modules; multichip packages; scale-up; semiconductor technology; stress; system-oriented wafer-scale packages; thin-film multilayer; wafer scale hybrid packaging; wafer scale interconnections; yield problems; Fabrication; Multichip modules; Nonhomogeneous media; Residual stresses; Semiconductor device modeling; Semiconductor device packaging; Semiconductor materials; Semiconductor thin films; Thermal stresses; Very large scale integration;
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on