Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
The authors describe the single-chip i860 CPU, a 64-bit, RISC (reduced-instruction-set-computer)-based microprocessor that executes parallel instructions using mainframe and supercomputer architectural concepts. They designed the 1,000,000-transistor, 10-mm*15-mm processor for balanced integer, floating-point, and graphics performance. They discuss the RISC core, memory management, floating-point unit, graphics, bus interface, software support, and interfacing to a DRAM system.<>
Keywords :
microprocessor chips; parallel architectures; reduced instruction set computing; 64 bit; Intel i860; RISC; architectural concepts; balanced integer; bus interface; core; floating-point; floating-point unit; graphics; interfacing; memory management; parallel instructions; reduced-instruction-set-computer; software support; Cache memory; Clocks; Delay; Design automation; Graphics; Hardware; High performance computing; Microprocessors; Reduced instruction set computing; Registers;
