A 4-MHz CMOS continuous-time filter with on-chip automatic tuning

Author

Krummenacher, François ; Joehl, Norbert

Author_Institution

Electron. Lab., ETH, Lausanne, Switzerland

Volume

23

Issue

3

fYear

1988

fDate

6/1/1988 12:00:00 AM

Firstpage

750

Lastpage

758

Abstract

A third-order elliptic low-pass continuous-time filter with a 4-MHz cutoff frequency, integrated in a 3- mu m p-well CMOS process, is presented. The design procedure is based on the direct simulation of a doubly terminated LC ladder filter by capacitors and fully balanced, current-controlled transconductance amplifiers with extended linear range. The on-chip automatic tuning circuit uses a phase-locked loop implemented with an 8.5-MHz controlled oscillator that matches a specific two-integrator loop of the filter. The complete circuit features 70-dB dynamic range (THD<-50 dB) and consumes only 16 mW from +or-2.5-V supplies.<>

Keywords

CMOS integrated circuits; active filters; low-pass filters; operational amplifiers; phase locked loops; tuning; variable-frequency oscillators; 16 mW; 2.5 V; 3 micron; 4 MHz; 8.5 MHz; CMOS; continuous-time filter; controlled oscillator; current-controlled transconductance amplifiers; cutoff frequency; design procedure; direct simulation; doubly terminated LC ladder filter; dynamic range; elliptic filters; low pass filters; on-chip automatic tuning; phase-locked loop; third-order; two-integrator loop; CMOS process; Capacitors; Circuit optimization; Circuit simulation; Cutoff frequency; Low pass filters; Nonlinear filters; Phase locked loops; Transconductance; Tuning;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.315

Filename

315