DocumentCode
1162263
Title
High-speed dynamic reference voltage (DRV) CMOS/ECL interface circuits
Author
Gu, R.X. ; Elmasry, M.I.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume
29
Issue
10
fYear
1994
fDate
10/1/1994 12:00:00 AM
Firstpage
1282
Lastpage
1287
Abstract
This paper introduces a circuit technique to increase the operating speed of CMOS/ECL interface circuits. The technique is based on shifting the reference voltage dynamically to follow the ECL input signal. HSPICE simulation results based on a 0.8-μm BiCMOS technology show the advantages of DRV CMOS/ECL in terms of speed and noise margins. An analytical delay model which fits HSPICE simulation results is addressed. The error between the model and the circuit simulator is within 4%
Keywords
BiCMOS integrated circuits; SPICE; VLSI; circuit analysis computing; emitter-coupled logic; logic CAD; logic gates; 0.8 micron; BiCMOS technology; CMOS/ECL interface circuits; ECL input signal; HSPICE simulation; analytical delay model; circuit simulator; circuit technique; dynamic reference voltage; noise margins; speed margins; Analytical models; BiCMOS integrated circuits; CMOS technology; Circuit noise; Circuit simulation; Delay; Resistors; Semiconductor device modeling; Very large scale integration; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.315215
Filename
315215
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