DocumentCode :
1162655
Title :
A controller architecture for high bandwidth active power filters
Author :
Mossoba, Joseph ; Lehn, Peter W.
Author_Institution :
Univ. of Illinois, Urbana, IL, USA
Volume :
18
Issue :
1
fYear :
2003
fDate :
1/1/2003 12:00:00 AM
Firstpage :
317
Lastpage :
325
Abstract :
This paper presents a novel architecture for a unit-delay digital deadbeat current controller for a shunt active power filter (APF). The APF is based on a fixed frequency pulsewidth modulated voltage-sourced converter (VSC). The proposed controller increases the APF current-tracking bandwidth without increasing the VSC switching frequency. Previous APF digital deadbeat controllers have a current-tracking delay of two or more sample-periods. One delay is due to current controller computation, a second sample delay represents VSC actuation time. The paper presents a new controller architecture employing both asynchronous programmable logic and a small microprocessor. Current-tracking feedback control calculations are executed in asynchronous programmable logic to effectively eliminate the controller computation delay. The microprocessor executes fundamental frequency disturbance rejection computations and all other supervisory functions. The proposed architecture retains all high-level functions in the microprocessor to minimize controller development time without compromising APF performance.
Keywords :
active filters; control system synthesis; digital control; electric current control; feedback; power engineering computing; power harmonic filters; asynchronous programmable logic; controller architecture; controller computation delay; current controller computation; fixed frequency pulsewidth modulated voltage-sourced converter; fundamental frequency disturbance rejection computations; high bandwidth active power filters; microprocessor; shunt active power filter; supervisory functions; unit-delay digital deadbeat current controller; Active filters; Bandwidth; Computer architecture; Delay effects; Digital control; Microprocessors; Power conversion; Programmable logic arrays; Programmable logic devices; Pulse width modulation converters;
fLanguage :
English
Journal_Title :
Power Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2002.807101
Filename :
1187450
Link To Document :
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