Title :
Improved deterministic test pattern generation with applications to redundancy identification
Author :
Schulz, Michael H. ; Auth, Elisabeth
Author_Institution :
Dept. of Electr. Eng., Tech. Univ. of Munich, West Germany
fDate :
7/1/1989 12:00:00 AM
Abstract :
The authors present several concepts and techniques aiming at a further improvement and acceleration of the deterministic test-pattern-generation and redundancy identification process. In particular, they describe an improved implication procedure and an improved unique sensitization procedure. While the improved implication procedure takes advantage of the dynamic application of a learning procedure, the improved unique sensitization procedure profits from a dynamic and careful consideration of the existing situation of value assignments in the circuit. As a result of the application of the proposed techniques, SOCRATES is capable of both successfully generating a test pattern for all testable faults in a set of combinational benchmark circuits, and of identifying all redundant faults with less than ten backtrackings
Keywords :
combinatorial circuits; learning systems; logic testing; redundancy; SOCRATES; combinational benchmark circuits; deterministic test pattern generation; learning procedure; redundancy identification; test pattern; unique sensitization procedure; Automatic testing; CMOS technology; Circuit faults; Circuit testing; Electron devices; Fault diagnosis; Notice of Violation; Redundancy; Switches; Test pattern generators;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
