Title :
Fast fault simulation for nonlinear analog circuits
Author :
Engin, Nur ; Kerkhoff, Hans G.
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
Abstract :
A new method of transient fault simulation uses dc bias grouping of faulty circuits and decreases the number of Newton-Raphson iterations needed to reach a solution. An experimental tool implementing this method achieves a speedup of 20% to 30% on a flat netlist.
Keywords :
analogue circuits; circuit simulation; fault simulation; nonlinear network analysis; Newton-Raphson iterations; dc bias grouping; fast fault simulation; nonlinear analog circuits; transient fault simulation; Analog circuits; Bridge circuits; Circuit faults; Circuit simulation; Computational modeling; Delay; Equations; Matrix decomposition; Predictive models; Vectors;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2003.1188261
