DocumentCode :
1163931
Title :
Analysis of strategies for constructive general block placement
Author :
Wimer, Shmuel ; Koren, Israel
Author_Institution :
Technion, Israel Inst. of Technol., Haifa, Israel
Volume :
7
Issue :
3
fYear :
1988
fDate :
3/1/1988 12:00:00 AM
Firstpage :
371
Lastpage :
377
Abstract :
The problem of general block placement in VLSI is considered, using the constructive approach in which blocks are selected and located one at a time. Some well-known strategies are presented for the selection of the next block to be located, novel ones are proposed, and a methodology to evaluate them is established. It is then shown that the optimization problem arising in constructive placement can be reduced to several much simpler sub problems. Objective functions for locating the selected block to achieve a good layout are presented for three different metrics: the squared Euclidean, rectilinear, and Euclidean. Appropriate optimization problems are obtained and solved analytically, using efficient computation schemes. These solutions have been implemented and are used in a real VLSI chip design environment. It is shown that the squared Euclidean and the rectilinear metrics are preferable to the Euclidean one
Keywords :
VLSI; circuit layout CAD; optimisation; CAD; IC design; VLSI; constructive approach; efficient computation schemes; general block placement; layout; optimization problem; rectilinear metrics; squared Euclidean metric; Algorithm design and analysis; Chip scale packaging; Cities and towns; Computational efficiency; Design automation; Humans; Optimization methods; Partitioning algorithms; Routing; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.3170
Filename :
3170
Link To Document :
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