DocumentCode
116587
Title
A high performance hardware based RNS-to-binary converter
Author
Karthik, K.M. ; Vun, C.H.
Author_Institution
Nanyang Technol. Univ., Singapore, Singapore
fYear
2014
fDate
10-13 Jan. 2014
Firstpage
147
Lastpage
148
Abstract
Due to its small size and parallel arithmetic operations, Residue Number System (RNS) based data is well suitable for implementing various digital signal processing functions that are commonly used in many consumer electronic devices nowadays. This paper presents the design of the RNS to Binary reverse converter which is typically the bottleneck in an RNS based signal processing system. Specifically, it describes a pipelined parallel prefix based modular adders which is used to implement the reverse converter for the {2k-1, 2k, 2k+1} moduli set based RNS system.
Keywords
adders; consumer electronics; pipeline arithmetic; residue number systems; RNS based signal processing system; RNS-to-binary converter; binary reverse converter; consumer electronic devices; digital signal processing functions; high performance hardware; pipelined parallel prefix based modular adders; residue number system; reverse converter; Adders; Computer architecture; Consumer electronics; Delays; Digital signal processing; Hardware; Logic gates;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics (ICCE), 2014 IEEE International Conference on
Conference_Location
Las Vegas, NV
ISSN
2158-3994
Print_ISBN
978-1-4799-1290-2
Type
conf
DOI
10.1109/ICCE.2014.6775947
Filename
6775947
Link To Document