DocumentCode
1166804
Title
A 20-Gb/s Adaptive Equalizer in 0.13-
CMOS Technology
Author
Lee, Jri
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Volume
41
Issue
9
fYear
2006
Firstpage
2058
Lastpage
2066
Abstract
An adaptive equalizer incorporates spectrum-balancing technique to achieve high speed and low power dissipation. Obviating the need for slicers, this circuit compares the low and high frequency components of the data spectrum and adjusts the boosting accordingly. Fabricated in 0.13-mum CMOS technology, this circuit achieves a data rate of 20 Gb/s while consuming 60mW from a 1.5-V supply
Keywords
CMOS integrated circuits; adaptive equalisers; low-power electronics; 0.13 micron; 1.5 V; 20 Gbit/s; 60 mW; CMOS technology; adaptive equalizer; data spectrum; spectrum-balancing technique; Adaptive equalizers; CMOS technology; Circuits; Coaxial cables; Dielectric losses; Frequency; Power dissipation; Skin effect; Telescopes; Transfer functions; Adaptive equalizer; capacitive degeneration; equalizing filter; power detector;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2006.880629
Filename
1683897
Link To Document