• DocumentCode
    1167074
  • Title

    Characteristics of trench j-MOS power transistors

  • Author

    MacIver, Bernard A. ; Valeri, Stephen J. ; Jain, Kailash C. ; Erskine, James C. ; Rossen, Rebecca

  • Author_Institution
    Gen. Motors Res. Lab., Warren, MI, USA
  • Volume
    10
  • Issue
    8
  • fYear
    1989
  • Firstpage
    380
  • Lastpage
    382
  • Abstract
    The fabrication of trench j-MOS transistors in bulk silicon, so that they can be operated in either a three-terminal or a four-terminal mode, is presented. When the transistors are operated in accumulation mode, the specific on-resistance is 0.8 m Omega -cm/sup 2/. In the four-terminal mode a high transconductance, 290 S/cm/sup 2/, is achieved by manipulating the inversion layer charge. In the three-terminal mode, mixed pentode-triode drain characteristics are exhibited. Response times are comparable to those of a junction FET. These properties make the trench j-MOS transistor attractive for power switching.<>
  • Keywords
    insulated gate field effect transistors; power transistors; semiconductor device testing; accumulation mode; bulk Si; four-terminal mode; inversion layer charge; mixed pentode-triode drain characteristics; power switching; response times; specific on-resistance; three-terminal mode; transconductance; trench j-MOS power transistors; Delay; Diodes; Etching; FETs; Fabrication; P-n junctions; Power transistors; Silicon on insulator technology; Substrates; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.31763
  • Filename
    31763