A Low-Power Digit-Based Reconfigurable FIR Filter

Author

Chen, Kuan-Hung ; Chiueh, Tzi-Dar

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei

Volume

53

Issue

8

fYear

2006

Firstpage

617

Lastpage

621

Abstract

In this brief, we present a digit-reconfigurable finite-impulse response (FIR) filter architecture with a very fine granularity. It provides a flexible yet compact and low-power solution to FIR filters with a wide range of precision and tap length. Based on the proposed architecture, an 8-digit reconfigurable FIR filter chip is implemented in a single-poly quadruple-metal 0.35-mum CMOS technology. Measurement results show that the fabricated chip operates up to 86 MHz when the filter draws 16.5 mW of power from a 2.5-V power supply

Keywords

CMOS integrated circuits; FIR filters; integrated circuit design; low-power electronics; reconfigurable architectures; 0.35 micron; 16.5 mW; 2.5 V; CMOS technology; finite-impulse response digital filters; low-power filter; reconfigurable architectures; CMOS technology; Computer architecture; Digital filters; Finite impulse response filter; Frequency response; Hardware; Matched filters; Power measurement; Power supplies; Semiconductor device measurement; Canonical signed digit (CSD); finite-impulse response (FIR) digital filters; reconfigurable architectures;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2006.875373

Filename

1683967