DocumentCode
1167717
Title
On-chip rise-time measurement
Author
Lin, San L. ; Mourad, Samiha
Author_Institution
Dept. of Electr. Eng., Santa Clara Univ., CA, USA
Volume
53
Issue
6
fYear
2004
Firstpage
1510
Lastpage
1516
Abstract
The on-chip rise-time measurement method for an exponentially decaying signal is proposed. By employing a differentiator, the method circumvents the challenges associated with directly measuring a signal´s rise time. The method can be used as the on-chip test instrument as part of a built-in self-testing (BIST) framework, or independently. CMOS circuits and layouts for implementation of the proposed method on a 0.25-μm technology have been developed.
Keywords
CMOS integrated circuits; built-in self test; integrated circuit testing; mixed analogue-digital integrated circuits; time measurement; CMOS circuits; built-in self-testing; design-for-test; mixed-signal testing; on-chip instrumentation; rise-time measurement; Automatic testing; Built-in self-test; CMOS technology; Cables; Circuit testing; Design for testability; Electronic equipment testing; Instruments; Semiconductor device measurement; Time measurement; 65; BIST; Built-in self-testing; DFT; design-for-test; mixed-signal testing; on-chip instrumentation; rise-time measurement;
fLanguage
English
Journal_Title
Instrumentation and Measurement, IEEE Transactions on
Publisher
ieee
ISSN
0018-9456
Type
jour
DOI
10.1109/TIM.2004.834060
Filename
1360090
Link To Document