DocumentCode
1168391
Title
A Highly Flexible Hardened RTL Processor Core Based on LEON2
Author
Portolan, Michele ; Léveugle, Regis
Author_Institution
TIMA Lab.
Volume
53
Issue
4
fYear
2006
Firstpage
2069
Lastpage
2075
Abstract
We present a hardened RTL processor core based on Leon2. Modifications are done at RT-level to achieve high configurability in an early stage of the development process. The main parts of the processor core can be protected against Single Event Upsets and Single Event Transients. Results and tradeoffs are presented and discussed
Keywords
error detection; fault tolerance; integrated circuit design; microprocessor chips; radiation hardening (electronics); transients; Leon2; RTL processor core hardening; design flow; error detection; fault tolerance; microprocessors; register transfer level; single event transient; single event upset; Aerospace electronics; Circuits; Electrical fault detection; Fault detection; Fault tolerance; Microprocessors; Protection; Registers; Single event transient; Single event upset; Error detection; RTL specifications; fault tolerance; microprocessors;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2006.876508
Filename
1684060
Link To Document