Analysis of optimization techniques in FPGA placement

Field Programmable Gate Array (FPGA) is a programmable chip that can be used to realize digital circuits in a short span of time. Placement plays a vital role in the FPGA design flow to effectively implement a digital design in the FPGA layout. The objective of placement tool is to identify the actual location of logic block and place portions of the circuit in the FPGA, which is the main deciding factor in reducing the wire length during routing. In this paper, performance of the placement optimization techniques such as Ant Colony Optimization (ACO), Particle Swarm Optimization (PSO) and Simulated Annealing are analyzed and comparative results are presented.