Title :
Analysis of highly doped collector transistors by using two-dimensional process/device simulation and its application of ECL circuits
Author :
Goto, Hiroshi ; Nagase, Yoji ; Takada, Tadakazu ; Tahara, Akinori ; Momma, Yoshinobu
Author_Institution :
Fujitsu Ltd., Kawasaki, Japan
fDate :
8/1/1991 12:00:00 AM
Abstract :
A report is presented of the results of an investigation of device parameters and collector-to-emitter breakdown voltages of double polysilicon self-aligned transistors with highly doped collectors using a two-dimensional process/device simulation system. Favourable phosphorous-ion implanting condition for a highly doped pedestal collector was found to achieve a high cutoff frequency as well as low AC base resistance and small base-collector capacitance, thereby keeping the minimum collector-to-emitter breakdown voltage of 3 V. The authors also report ECL circuit performance improvements achieved in experiments that realized a minimum ECL gate delay time of 26.3 ps/gate at switching current of 1.64 mA as a result of process optimization. Moreover, a 1/8 static frequency divider T-F/F has been observed to operate up to a maximum frequency of 15.8 GHz
Keywords :
bipolar integrated circuits; bipolar transistors; digital integrated circuits; emitter-coupled logic; frequency dividers; semiconductor device models; 1.64 mA; 1/8 static frequency divider T-F/F; 15.8 GHz; 26.3 ps; 2D device simulation; 3 V; ECL circuits; P ion implantation; Si:P; collector-to-emitter breakdown voltage; collector-to-emitter breakdown voltages; device parameters; double polysilicon self-aligned transistors; high cutoff frequency; highly doped collector transistors; highly doped pedestal collector; low AC base resistance; maximum frequency; minimum ECL gate delay time; polycrystalline Si; process optimization; small base-collector capacitance; switching current; Analytical models; Capacitance; Circuit optimization; Circuit simulation; Cutoff frequency; Delay effects; Frequency conversion; Semiconductor process modeling; Switching circuits; Vents;
Journal_Title :
Electron Devices, IEEE Transactions on