A 0.18-μm CMOS offset-PLL upconversion modulation loop IC for DCS1800 transmitter

Author

Hsu, June-Ming

Author_Institution

Syst.-on-Chip Technol. Center, Ind. Technol. Res. Inst., Hsin-Chu, Taiwan

Volume

38

Issue

4

fYear

2003

fDate

4/1/2003 12:00:00 AM

Firstpage

603

Lastpage

613

Abstract

A DCS1800 offset-phase-locked-loop upconversion modulation loop integrated circuit (IC) fabricated in a 0.18-μm CMOS technology is presented in this paper. This IC operates at 2.8-V supply voltage with a current consumption of 36 mA. The measured root-mean-square and peak phase errors of the Gaussian minimum shift keying (GMSK) transmission signal are 1.6° and 4°, respectively. It is shown that such circuits can be implemented in CMOS process with current dissipation and performance comparable to BiCMOS chips. Advantages of upconversion modulation loop and design issues of I/Q modulators are also described.

Keywords

CMOS digital integrated circuits; UHF integrated circuits; cellular radio; digital phase locked loops; digital radio; field effect MMIC; integrated circuit design; minimum shift keying; 0.18 micron; 2.8 V; 36 mA; CMOS; DCS1800 transmitter; GMSK; Gaussian minimum shift keying; I/Q modulators; current consumption; design issues; measured root-mean-square; offset-PLL upconversion modulation loop IC; peak phase errors; BiCMOS integrated circuits; CMOS integrated circuits; CMOS process; CMOS technology; Integrated circuit measurements; Integrated circuit technology; Phase measurement; Semiconductor device measurement; Transmitters; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2003.809518

Filename

1190596