• DocumentCode
    1170640
  • Title

    A nonredundant-radix-4 serial multiplier

  • Author

    Primlani, Kamla K. ; Meador, Jack L.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Washington State Univ., Pullman, WA, USA
  • Volume
    24
  • Issue
    6
  • fYear
    1989
  • fDate
    12/1/1989 12:00:00 AM
  • Firstpage
    1729
  • Lastpage
    1736
  • Abstract
    The authors describe a serial multiplier based upon a new mapping of a nonredundant-radix-4 multiplication algorithm. This multiplier forms binary partial products by adding multiples of 0, 1, 2, or 3 times the multiplicand in all internal modules. The circuit interprets multiplier data as radix-4 digits which do not share overlapping bits. A trivial interpretation of the multiplier data eliminates the need for additional circuitry to process redundant bit overlap. The circuit described uses simpler recording circuitry while retaining the same order area and time of the modified Booth multiplier
  • Keywords
    CMOS integrated circuits; VLSI; digital arithmetic; integrated logic circuits; multiplying circuits; pipeline processing; CMOS IC; VLSI implementation; binary partial products; multiplication algorithm mapping; nonredundant-radix-4 serial multiplier; serial pipelined multiplier; Adders; Application specific integrated circuits; Arithmetic; Art; Delay; Hardware; Large scale integration; Pipelines; Signal processing; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.45012
  • Filename
    45012