DocumentCode
1170805
Title
Scaling up the Atlas chip-multiprocessor
Author
Sassone, Peter G. ; Wills, D. Scott
Author_Institution
Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
Volume
54
Issue
1
fYear
2005
Firstpage
82
Lastpage
87
Abstract
Atlas, a dynamically multithreading chip-multiprocessor (CMP), gains little complexity as processing elements are added. When the model is scaled up with strategic layouts and realistic latencies, area and power efficiency surpass that of an aggressive out-of-order processor, though results are sensitive to global communication delay.
Keywords
multi-threading; multiprocessing systems; parallel architectures; Atlas chip-multiprocessor scaling; multithreading; out-of-order processor; processing elements; Data mining; Delay; Global communication; Hardware; Multithreading; Out of order; Parallel processing; Proposals; Scalability; Yarn; 65; Index Terms- Dynamic multithreading; chip-multiprocessor; scaling.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2005.12
Filename
1362642
Link To Document