Title :
A 10 K-gate 950 MHz CML demonstrator circuit made with a 1-μm trench-isolated bipolar silicon technology
Author :
Depey, Maurice P. ; Dell´Ova, Francis ; Chateau, Jean-Marc ; Mallardeau, Catherine ; Fryers, Albert J. ; Woerner, Klaus
Author_Institution :
SGS-Thomson Microelectron., Grenoble, France
fDate :
6/1/1989 12:00:00 AM
Abstract :
A quad 512-b static shift register consuming 1.8 mW/stage designed to demonstrate the capabilities of an advanced bipolar silicon technology is discussed. The process uses 1-μm lithography, trench isolation, polyemitter transistors, polysilicon resistors, and polycide layer for local interconnections. This VLSI circuit (over 35 K transistors, 86-mm2 chip) has been implemented on a sea-of-cells structure. An appropriate scheme has been used for the clock distribution. The experimental results show operation at a clock frequency up to 950 MHz
Keywords :
VLSI; bipolar integrated circuits; elemental semiconductors; emitter-coupled logic; integrated circuit technology; integrated logic circuits; shift registers; silicon; 1 micron; 1.8 mW; 950 MHz; CML demonstrator circuit; Si bipolar technology; VLSI circuit; clock distribution; clock frequency; current mode logic; lithography; local interconnections; polycide layer; polyemitter transistors; polysilicon resistors; quad type; sea-of-cells structure; static shift register; trench isolation; Clocks; Frequency; Integrated circuit interconnections; Isolation technology; Lithography; Resistors; Shift registers; Silicon; Transistors; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
